1. Field of the Invention
The present invention relates to integrated circuits, and more particularly, to integrated circuits including bit line sense amplifiers and related methods.
2. Description of the Related Art
In a dynamic random access memory (DRAM), a current sense amplifier is generally used to read out information that is sensed by a bit line sense amplifier. The current sense amplifier can sense faster than a voltage sense amplifier, so the current sense amplifiers are more widely used. The current sense amplifier senses a current signal input through a transmission line, amplifies the current signal, and outputs the current signal as a voltage signal. The current sense amplifier may be required to effectively receive the current signal through the transmission line so that data from the transmission line can be properly sensed.
Conventionally, an operating point of a current sense circuit can be determined using a passive load circuit. Because the passive load circuit may have a relatively low input resistance, however, loss of the current signal may occur, and the data may not be properly sensed.
To reduce loss of the current signal, the input resistance of the passive load circuit may be increased. If the input resistance of the passive load circuit increases, however, the data may be transmitted more slowly. This problem may worsen as a transmission line length increases and a distance between the current sense circuit and a load resistance increases. In an attempt to address this problem, it has been suggested that the operating point of the current sense circuit be determined using an ideal current source. This suggestion, however, may have the disadvantage that the circuit may become very large and difficult to control.
FIG. 1 is a circuit diagram of a semiconductor memory device including a conventional passive load circuit. A passive load circuit 130 is connected to a pair of data lines GIO and GIOB. Data, which is sensed and amplified by a bit line sense amplifier 110, is transmitted to a current sense amplifier 140 through transmission lines, i.e., the pair of data lines GIO and GIOB. If a transmission gate 120 is turned on using a column selection line CSL, the data which is sensed by the bit line sense amplifier 110 is loaded to the pair of data lines GIO and GIOB, and a small change in the current signal occurs in the pair of data lines GIO and GIOB. The current sense amplifier 140 senses and amplifies changes of current signals I1 and I2 and generates output voltages DO and DOB responsive to the current signals I1 and I1.
The conventional passive load circuit 130 includes a first PMOS transistor P1 and a second PMOS transistor P2. The first PMOS transistor P1 is connected between a supply voltage VCC and the data line GIO. The second PMOS transistor P2 is connected between the supply voltage VCC and the complementary data line GIOB. The first and second PMOS transistors P1 and P2 are turned on/off using a supplementary enable signal ONB. Therefore, the first and second PMOS transistors P1 and P2 are turned on when an enable signal (i.e., the supplementary data enable signal ONB) is at a logic “low” level. Since the voltage level of the supplementary data enable signal ONB is constant at the logic “low” level, turn-on resistances of the first and second PMOS transistors P1 and P2 are constant. Thus, the first and second transistors P1 and P2 may function as passive elements having relatively constant resistances.
If data sensed by the bit line sense amplifier 110 is equal to 0, and the transmission gate 120 is turned on, the voltage level of the data line GIO will decrease. Moreover, a small change occurs in the current signal of the data line GIO. As the voltage level of the data line GIO decreases, a voltage loaded across the first PMOS transistor P1 increases, and thus a capacity of current flowing from the supply voltage VCC through the first PMOS transistor P1 to the data line GIO may increase. Accordingly, the change in the current signal I1 that flows into the current sense amplifier 140 decreases. That is, losses of the current signals I1 and I2, which flow into the current sense amplifier 140, may be incurred. The current sense amplifier 140 may thus be unable to properly sense the data.